Profile Image
Assistant Lecturer

zaid Abdulrazzaq

Research Interests

|

Gender MALE
Place of Work Technical Engineering College for Computer and AI / Mosul
Position Faculty member
Speciality engineering
Email zaid.a.abdulrazzaq@ntu.edu.iq
Phone 07703364432
Address Al-khansaa, Al-sukar, Mosul, Iraq

Skills

computer skills (100%)

Publications

Advanced Denoising of EMG Signals for Medical Applications: A Novel Arduino-Based Enhancement Approach
Apr 4, 2025

The accurate interpretation of electromyography (EMG) signals is crucial for medical diagnostics and rehabilitation systems. However, the inherent presence of noise, including motion artifacts and powerline interference, significantly hampers signal clarity. This research presents a novel, cost-effective approach for advanced EMG signal denoising using an Arduino-based platform integrated with custom signal processing techniques. By leveraging optimized digital filtering algorithms, the proposed system effectively suppresses noise while preserving critical muscle activity patterns. Experimental results demonstrate a significant improvement in signal-to-noise ratio (SNR), providing clean and reliable EMG data for enhanced medical analysis and real-time biomedical applications. The simplicity, affordability, and efficiency of the system position it as a promising solution for portable healthcare and rehabilitation devices.

New Novel FPGA based image encryption methods using multiple chaotic Maps
Apr 2, 2025

In the digital era, the security of information has become paramount, particularly in the realm of image data transmission. Encryption is the process of encoding information to prevent unauthorized access and plays a crucial role in ensuring this security. The two proposed methodologies employ four distinct Chaos Pseudo Random Bit Generators (PRBGs): the Lozi map, Tent map, Logistic map, and Quad map. The image is divided into four segments, each encrypted using one of the PRBGs, enhancing the complexity and security of the encrypted image. The randomness of the generated cryptographic keys using the National Institute of Standards and Technology (NIST), which is a Statistical Test Suite for test Pseudorandom Number Generators for Cryptographic Applications. The encryption scheme was implemented on a Field Programmable Gate Array (FPGA) ZYNQ702 evaluation board kit, The results demonstrated a significant improvement in the NIST's A Statistical Test Suite outcome compared to existing methods, underscoring the superior performance of the proposed encryption technique. This research proposed two systems with comparative study and contributes to the field of image encryption by offering more secure effective methods, thereby paving the way for safer image data transmission utilize FPGA with 667 MHZ frequency and 5.3 Gbps throughput.

Efficient Real-Time Key Generation for IoT Using Multi-Dimensional Chaotic Maps
Mar 22, 2025

The paper presents a new approach for triple key generation techniques with Henon, Lozi and Duffing chaotic maps in FPGA. Three key streams generated by XORing chaotic maps with pseudo random number generators, the results of XORing PN1 with PN2 is called gold code generator. The algorithm was built in embedded Xilinx System Generator tool (XSG) and the results were validated using MATLAB/SIMULINK environment. NIST, Normality and Dieharder test randomness tests were employed for key streams and verified as the best randomness in comparison with recent work.

Baghdad Science Journal
Aug 24, 2024

Frequency hopping is a main technique for wireless communication, avoiding interference and interception. This paper provides novel hardware design for frequency-hopping pseudorandom bit generator (PRBG).PRBG design by chaotic maps on FPGA.Two proposed methods in this work first combine chaotic maps in a cascade manner called fixed point cascade chaotic maps (FPCCM-FHSS), and second, the conjunction of chaotic maps done in an XORed manner called fixed point an XOR chaotic method (FPXORCM-FHSS).The results were the first eight NIST randomness tests.Frequency indicates that all p-values larger than 0.01 are needed to achieve better randomness, Second and third were die-hard tests, many distribution tests with significant p-values (p <0.01) that meet high standards of statistical randomness, making them suitable for channel security.Last were the FPGA results between the proposed methods for speed and hardware resources).The works implemented on XILINX ZC702 achieved 2 Gbps to meet the speed requirements of the change of the carrier frequency

Design and Enhancing Security Performance of Image Cryptography System Based on Fixed Point Chaotic Maps Stream Ciphers in FPGA
May 25, 2024

Journal Baghdad Science Journal

Within this document, a novel system for image cryptography design utilizing fixed-point stream cipher chaotic maps is proposed. The system consists of fixed chaotic maps combined with generated 32-bit Pseudo Number (PN) all implemented using Field Programmable Gate Arrays (FPGA) through the Xilinx System Generator (XSG) environment. The most common chaotic maps-based cryptography involved in this work are Logistic, Lozi and Tent. The parameters of each type determine the key space required for decrypt the original pixel of plain image, Logistic map has one parameter r, Lozi has two parameters α and β, Tent has one parameter μ. The main idea was to combine another parameter pseudo number (PN) to increase key space, which is the main measure of security performance against brute force attack. An innovative pseudorandom bit generator (PRBG) referred to as XORing these chaotic maps were called the fixed-point cascade chaotic maps-PRBG (FPCCM-PRBG), with an eight least significant bits of 32-bit pseudo number generator (PN) this method is known as fixed point cascade chaotic maps-PNBG (FPCCM-PRNBG). The randomness of the generated keys was evaluated using the National Institute of Standards and Technology (NIST) tests, including frequency, Frequency (Mono bit) and runs test. The security performance assessed through histogram analysis, correlation coefficient analysis, information entropy, pixel changing rate, and structural similarity. Xilinx system generator is an effective tool embedded in MATLAB/SIMULINK environment utilized for the work implementation. The system implemented using co-simulation method on the ZYNQ 7000 SoC ZC702 Evaluation Kit, with a key space of 2288 and a throughput of 269. 32 MB/sec.